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CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00
User’s Manual U16898EJ6V0UD
122
(4) Capture register data retention
The value of 16-bit timer capture/compare register 0n0 (CR0n0) after 16-bit timer/event counter 00 has
stopped is not guaranteed.
Remark
n = 0, 1
(5) Setting of 16-bit timer mode control register 00 (TMC00)
The timer operation must be stopped before writing to bits other than the OVF00 flag.
(6) Setting of capture/compare control register 00 (CRC00)
The timer operation must be stopped before setting CRC00.
(7) Setting of 16-bit timer output control register 00 (TOC00)
<1>
Timer operation must be stopped before setting other than OSPT00.
<2>
If LVS00 and LVR00 are read, 0 is read.
<3>
OSPT00 is automatically cleared after data is set, so 0 is read.
<4>
Do not set OSPT00 to 1 other than in one-shot pulse output mode.
<5>
A write interval of two cycles or more of the count clock selected by prescaler mode register 00 (PRM00)
is required, when OSPT00 is set to 1 successively.
(8) Setting of prescaler mode register 00 (PRM00)
Always set data to PRM00 after stopping the timer operation.
(9) Valid edge setting
Set the valid edge of the TI000 pin with bits 4 and 5 (ES000 and ES010) of prescaler mode register 00
(PRM00) after stopping the timer operation.
(10) One-shot pulse output
One-shot pulse output normally operates only in the free-running mode or in the clear & start mode at the valid
edge of the TI000 pin. Because an overflow does not occur in the clear & start mode on a match between
TM00 and CR000, one-shot pulse output is not possible.
(11) One-shot pulse output by software
<1>
Do not set the OSPT00 bit to 1 again while the one-shot pulse is being output. To output the one-shot
pulse again, wait until the current one-shot pulse output is completed.
<2>
When using the one-shot pulse output of 16-bit timer/event counter 00 with a software trigger, do not
change the level of the TI000 pin or its alternate function port pin. Because the external trigger is valid
even in this case, the timer is cleared and started even at the level of the TI000 pin or its alternate
function port pin, resulting in the output of a pulse at an undesired timing.
<3>
Do not set the 16-bit timer capture/compare registers 000 and 010 (CR000 and CR010) to 0000H.
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